1. Technical Field
The present invention is generally related to integrated circuits and in particular to a process of forming a bipolar transistor structure in an integrated circuit. Still more particularly, the present invention is related to a process for forming a bipolar transistor structure that is compatible for forming CMOS structures using silicon-on-insulator technology.
2. Description of the Related Art
The integration of metal oxide-semiconductor field effect (MOSFET) structures and bipolar transistors on a single substrate has become very desirable. In addition, silicon-on-insulator (SOI) technology is attractive for high speed complementary metal oxide-semiconductor (CMOS) and radiation hardened devices. SOI technology offers the highest performance for a given feature size due to the minimization of parasitic compacitance. In SOI technology, small islands of silicon which contain the individual device are fabricated on an insulating substrate. These islands are then interconnected in the normal way.
As is well known in the art, digital and linear functions are often performed by integrated circuits using either bipolar or metal-oxide-semiconductor (MOS) technology. Bipolar integrated circuits, of course, generally provide higher speed operation and greater drive currents then the MOS circuits. Recent advances in manufacturing technology have allowed the use of both bipolar and CMOS transistors in the same integrated circuit (commonly referred to as BiCMOS devices). Several merged BiCMOS processes make use of the inherent vertical NPN transistor present in a bulk CMOS process. In a SOI CMOS, such vertical structures do not exist and lateral bipolar transistors may be suitable for sharing fabrication steps with MOSFET's. Unfortunately, lateral bipolar transistors suffer from an inherent performance limitation related to their large base width and the base series resistance. As a result, it would be advantageous to have a process for manufacturing a vertical bipolar transistor with a SOI MOS transistor.